The ongoing trend to push high-efficiency PV cell devices to higher efficiency levels is more and more accompanied by the adaption of semiconductor device fabrication standards. One of the reasons is the rising sensitivity of p-i-n PV cell structures of thin film layer stacks to the impact of impurities, which may be increasingly harmful with respect to the proper functionality of the layers themselves or their surface interaction.
Therefore, suitable measures have to be implemented to suppress such film contamination in the manufacturing process. From the equipment point of view, it is highly desirable to avoid potential contamination sources upfront and to implement efficient treatments for avoiding so-called memory effects. Specifically, for the manufacture of HJT devices Indeotec has produced a successful design with its PECVD Mirror Reactor concept, which eliminates the need of wafer flipping and hence eliminated the potential contamination source of flipping automation.
Additionally, Indeotec successfully tested a plasma treatment method which means it’s possible to put the intrinsic and the subsequent doped a-Si:H layer in one reactor, which could reduce the number of required deposition chambers by half.